TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 279

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
EMG Release Register (MTPDnEMGREL)
<EMGREL>: EMG disable code
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
After reset
(1) EMG Protection Circuit
MTPDnEMGREL register.
unit. This circuit is activated when the EMG input becomes low. The EMG protection circuit offers an
emergency stop mechanism: when the EMG input is asserted (H → L), all six port outputs are
immediately disabled (depending on the MTPDnEMGCR<EMGMD> setting) and an EMG interrupt
(INTEMG) is generated. MTPDnEMGCR<EMGMD> can be set to output a control signal that sets
external output ports to high impedance in case of an emergency.
When a tool break occurs, external output ports can be set to high impedance through the setting of
the PORTMD register.
MTPDnEMGSTA<EMGST> indicates that the EMG protection circuit is active. In this state, EMG
protection can be released by setting all the port output lines inactive (MDOUT[10:8][5:0]) and then
setting MTPDnEMGCR<EMGRS> to 1.
register and then clear MTPDnEMGCR<EMGEN> to 0. (These three instructions must be executed
consecutively.) While the EMG protection input is low, any attempt to release the EMG protection
state is ignored. Before setting MTPDnEMGCR<EMGRS> to 1 to release EMG protection, make
sure that MTPDnEMGST<EMGI> is high.
written in the MTPDnEMGREL register to prevent it from being inadvertently disabled.
The EMG protection functions can be disabled by setting 5A and A5 in this order to bits 7 to 0 of the
When disabling these functions, MTPDnEMGCR<EMGEN> must be cleared to 0.
* This register is used for both the EMG function.
The EMG protection circuit consists of an EMG protection control unit and a port output disable
A tool break also disables all six PWM output lines depending on the EMGCR<EMGMD> setting.
EMG protection is set through the EMG Control Register (MTPDnEMGCR). A read value of 1 in
To disable the EMG protection function, write 0x5A and 0xA5 in this order to the MTPDnEMGREL
The EMG protection circuit can be disabled only after the specified key codes (0x5A, 0xA5) are
R→0
R→0
R→0
0x4005 0430, 0x4005 04B0
31
23
15
0
0
0
7
0
-
-
-
R→0
R→0
R→0
30
22
14
0
0
0
6
0
-
-
-
TMPM380/M382 - 79 / 87 -
R→0
R→0
R→0
29
21
13
0
0
0
5
0
-
-
-
R→0
R→0
R→0
28
20
12
0
0
0
4
0
-
-
-
EMGREL
W
R→0
R→0
R→0
27
19
11
0
0
0
3
0
-
-
-
R→0
R→0
R→0
26
18
10
0
0
0
2
0
-
-
-
R→0
R→0
R→0
25
17
0
0
9
0
1
0
-
-
-
TMPM380/M382
R→0
R→0
R→0
24
16
0
0
8
0
0
0
-
-
-

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