TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 346

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

12 Encoder Input Circuit (ENC)
12.3.3
12.3.3.1
12.3.3.2
12.3.3.3
12.3.3.4
ENRELOAD reg ＝0x0151
ENRELOAD reg ＝0xFFFF
Counter Operation and Interrupt Generation When <CMPEN> = 0
• No event timeout error
• Event timeout error
<ENDEV> = 000
EN0INT reg ＝0x0150
(Compare Register)
EN0INT reg ＝0xFFFF
(Compare Register)
ENINT reg ＝0x0150
(Compare Register)
Event timeout period
ENINT reg ＝0xFFFF
(Compare Register)
Event timeout period
EN0INT reg ＝0x0150
(Compare Register)
Event timeout period
EN0INT reg ＝0x0150
(Compare Register)
Rotation Pulse Count
Encoder Mode
Sensor Event Count Mode
<ENDEV> = 000
Sensor Timer Count Mode
Timer Mode
Encoder Pulse, ENCLK
ENINT reg ＝0xFFFF
(Compare Register)
ENINT reg ＝0x0150
(Compare Register)
Encoder Pulse, ENCLK
Encoder Input, B
Encoder Input, A
Encoder Pulse, enclk
Encoder Counter
Encoder Counter
INTENC0
INTENC0
Encoder Counter
Encoder Counter
Encoder Counter
(event)
(event)
INT ENC0
(compare)
(compare)
(compare)
(compare)
INTENC0
Encoder Input, A
Encoder Input, B
INTENC0
INTENC0
Encoder Counter
ｆｓｙｓ
INTENC0
U/V/W
TMPM380/M382 - 20 / 23 -
(event)
ｆｓｙｓ
ｆｓｙｓ
Encode Counter
(compare)
(compare)
INTENC0
INTENC0
0
0
Encoder
C
0
0
0
1
1
t
ｆｓｙｓ
1
2
1
1
2
0
3
3
2
2
2
1
3
3
3
2
0
0
3
The counter is cleared when its value
has reached the value of <RELOAD>.
1
1
The counter is cleared by a rotation pulse
14C
14C
2
2
14D
14C
14C
14D
9E
3
3
14E
14D
14D
14E
9F
14C
14E
14E
14F
14F
0
14D
The counter is cleared when it
has reached the value of <INT>
150
14F
14F
150
1
14E
14F
14F
150
151
150
151
2
14F
150
150
152
151
151
3
0
150
151
0
152
152
4
1
151
152
1
5
152
2
The counter wraps around to 0 on overflow.
The counter wraps around to 0 on overflow.
The counter is cleared when its value
has reached the value of <RELOAD>.
FFFD FFFE
The counter is cleared when it
has reached the value of <INT>
FFFD FFFE
FFFD FFFE
The counter wraps
around to 0 on overflow.
FFFD FFFE
FFFF
FFFD FFFE
TMPM380/M382
FFFF
FFFF
0
FFFF
FFFF
1
0
0
0
2
0
1
1
1
1
2
2
2
2