TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 459

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

15 Serial Bus Interface (I2C/SIO)
(Note)
15.6.5 Restart Procedure
SCL (bus)
SCL pin
SDA pin
<LRB>
<BB>
<PIN>
Do not write <MST> to “0” when it is “0.” (Restart cannot be initiated.)
Restart is used when a master device changes the data transfer direction without
terminating the transfer to a slave device. The procedure of generating a restart in the
master mode is described below.
First, set SBInCR2 <MST, TRX, BB> to “0” and write “1” to <PIN> to release the bus. At this
time, the SDA pin is held at the “H” level and the SCL pin is released. Because no stop
condition is generated on the bus, other devices recognize that the bus is busy. Then, test
SBInSR <BB> and wait until it becomes “0” to ensure that the SCL pin is released. Next,
test <LRB> and wait until it becomes “1” to ensure that no other device is pulling the SCL
bus line to the “L” level.
above-mentioned steps 15.6.2 to generate the start condition.
To satisfy the setup time of restart, at least 4.7-μs wait period (in the standard mode) must
be created by the software after the bus is determined to be free.
(Note) X: Don’t care
SBInCR2 ← 0 0 0 1 1 0 0 0
if SBInSR<BB> ≠ 0
Then
if SBInSR<LRB> ≠ 1
Then
4.7 μ s Wait
SBInCR1 ← X X X 1 0 X X X
SBInDBR ← X X X X X X X X
SBInCR2 ← 1 1 1 1 1 0 0 0
“0” → <MST>
“0” → <TRX>
“0” → <BB>
“1” → <PIN>
Fig 15-19 Timing Chart of Generating a Restart
7 6 5 4 3 2 1 0
9
TMPM380/M382 - 30 / 41 -
Once the bus is determined to be free this way, use the
Releases the bus.
Checks that the SCL pin is released.
Checks that no other device is pulling the SCL pin to the
“L” level.
Selects the acknowledgment mode.
Sets the desired slave address and direction.
Generates the start condition.
“1” → <MST>
“1” → <TRX>
“1” → <BB>
“1” → <PIN>
4.7 μ s (min.)
Start condition
TMPM380/M382