TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 429

no-image

TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
14 SSP (Synchronous Serial Port)
Notes related to specifications
(1) When correct data reception is disturbed due to clock phase shift during reception:
After disabling SSP, clearing all data in the receive FIFO and then enabling SSP again will
restore the correct reception status.
Example: How to restore a receive data error
(SSP0CR1) ←
(GPIOAFR1) ←
while((SSP0SR)&0x00000004)!=0x00000000){
Reg ← (SSP0DR)}
(GPIOAFR1) ←
(SSP0CR1) ←
((SSP0CR1)&(0xFFFFFFFD))
((GPIOAFR1)&(0xFFFFFFF0))
((GPIOAFR1)|(0x0000000F))
((SSP0CR1)|(0x00000002))
TMPM380/M382 - 28 / 28 -
; Set "0" to SSP0CR1<SSE>.
Sync serial port disable
; Set "0" to GPIOAFR1.
Port A SSP0 function disable
; Read (RNE="0")SSP0DR until the receive FIFO
becomes empty.
; Set "1" to GPIOAFR1.
; Set "1" to SSP0CR1<SSE>.
Sync serial port enable
Port A SSP0 function enable
TMPM380/M382

Related parts for TMPM382FSFG