TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 600

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

(2)
Basic operation
While commands are generally comprised of several bus cycles, the operation to apply 32-bit
data transmit command to the flash memory is called "bus write cycle." The bus write cycles are
to be in a specific sequential order and the flash memory will perform an automatic operation
when the sequence of the bus write cycle data and address of a command write operation is in
accordance with a predefined specific sequence. If any bus write cycle does not follow a
1) Read
2)
Generally speaking, this flash memory device has the following two operation modes:
Transition to the automatic mode is made by executing a command sequence while it is in the
memory read mode. In the automatic operation mode, flash memory data cannot be read and
any commands stored in the flash memory cannot be executed. In the automatic operation
mode, any interrupt or exception generation cannot set the device to the read mode except
when a hardware reset is generated. During automatic operation, be sure not to cause any
exceptions other than debug exceptions and reset while a debug port is connected. Any
exception generation cannot set the device to the read mode except when a hardware reset is
generated.
• Read/reset command and Read command (software reset)
When data is to be read, the flash memory must be set to the read mode. The flash memory
will be set to the read mode immediately after power is applied, when CPU reset is removed,
or when an automatic operation is normally terminated. In order to return to the read mode
from other modes or after an automatic operation has been abnormally terminated, either
the Read/reset command (a software command to be described later) or a hardware reset is
used. The device must also be in the read mode when any command written on the flash
memory is to be executed.
When ID-Read command is used, the reading operation is terminated instead of
automatically returning to the read mode. In this case, the Read/reset command can be
used to return the flash memory to the read mode. Also, when a command that has not been
completely written has to be canceled, the Read/reset command must be used. The Read
command is used to return to the read mode after executing 32-bit data transfer command
to write the data "0x0000_00F0" to an arbitrary address of the flash memory.
•
•
•
Command write
This flash memory uses the command control method. Commands are executed by
executing a command sequence to the flash memory. The flash memory executes
automatic operation commands according to the address and data combinations applied
(refer to Command Sequence).
If it is desired to cancel a command write operation already in progress or when any
incorrect command sequence has been entered, the Read/reset command is to be
executed. Then, the flash memory will terminate the command execution and return to the
read
The mode to read memory data (Read mode)
The mode to automatically erase or rewrite memory data (Automatic operation)
With the Read/reset command, the device is returned to the read mode after
completing the third bus write cycle.
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