TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 555

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

22 DMA Controller (DMAC)
[Explanation] The same explanation is applied for the other channels too.
p. <I>
q. <DI>
r.
s. <Swidth[2:0]>
t.
u. <SBSize[2:0]>
v. <TransferSize>
Note) The burst size to be set with DBsize has nothing to do with the HBURST for the AHB bus.
Note) The burst size to be set with SBsize has nothing to do with the HBURST for the AHB bus.
Note) If the transfer source bit width is smaller than the transfer destination bit width, care must be taken when setting
Register for enabling a transfer end interrupt when the scatter/gather function is used
Increments the address of a transfer destination.
Depends on the bit width of the transfer source. Increments the address, each depending on
Dwidth as follows:
8-bit
16-bit
32-bit
Increments the address of a transfer destination.
Depends on the bit width of the transfer source. Increments the address, each depending on
Swidth as follows:
8-bit
16-bit
32-bit
Set a transfer destination bit width so that the transfer size becomes an integral multiple of the
transfer destination bit width.
Set the total number of transfers when the DMAC is used as the flow controller.
This value decrements to "0" as DMAC transfer is executed. The read operation reads the
number of transfers that have not been executed yet.
The total number of transfers is used as the unit for the transfer source bit width.
<SI>
<DBSize[2:0]>
ex: When Swidth=8bit, the number of transfers is expressed in the units of byte.
ex: When Swidth=16bit, the number of transfers is expressed in the units of half word.
ex: When Swidth=32bit, the number of transfers is expressed in the units of word.
: 1 byte
: 2 bytes
: 4 bytes
: 1 byte
: 2 bytes
: 4 bytes
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