TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 536

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

22 DMA Controller (DMAC)
22.1 Function Overview
The table below lists its major functions.
* 1 word = 32 bits
FIFO
Number of channels 2ch
Bus master
Priority
Bus width
Burst size
Number of transfers
Address
Endian
Transfer type
Interrupt function
Special Function
TMPM380/M382 has a DMA controller controlled by DMA request select registers
Note1) Follows transfer type is not supported
Item
From Peripheral circuit (register) to Peripheral circuit (register)
Hardware start
Software start
32bit×1 (AHB)
DMA channel 0 (high) to DMA channel 1 (low) Fixed by hardware
4word × 2ch
8/16/32bit
1/4/8/16/32/64/128/256
up to 4095
Transfer source
address
Transfer destination
address
Only little endian is supported.
Peripheral circuit (register) → memory
Memory → peripheral circuit (register)
Memory → memory
(Note1)
Transfer end interrupt
Error interrupt
Scatter/gather function
Table 22-1 DMA controller functions
TMPM380/M382 - 1 / 26 -
Function
incr / no-incr
incr / no-incr
Supports 14 types of DMA requests for
peripheral IPs.
Started with a write to the DMACSoftBReq
register.
Settable individually for transfer source and
destination
It is possible to specify whether Source and
Destination addresses should increment or
should not increment (should be fixed).
(Address wrapping is not supported.)
When "memory → memory" is selected,
hardware start for DMA startup is not
supported. See the DMACCxConfiguration
register for more information.
Overview
TMPM380/M382