TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 256

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
10 16-bit Multi-purpose Timers (MPTs)
IGTRGSEL=”1”
MT0IN pin
10.6.17 Trigger input
10.6.17.1
MT0IGICR<IGTRGSEL>.
The logic for an input trigger signal on the MT0IN pin can be specified using
(when a stop trigger is accepted within a period, the output is immediately initialized and the
counter is stopped).
All triggers (Start and stop) are ignored when the timer is stopped (MT0RUN <MTRUN> = “0”).
Figure 10-17 Trigger accepted in Stop counter after completing output in the current period
In one-time stop mode, the counter accepts a stop trigger but does not accept a start trigger
• IGTRGSEL = “0”:
• IGTRGSEL =” 1”:
is low.
Counting starts on the rising edge. The counter is cleared and stopped while the MT0IN pin
pin is high.
Selecting an input signal logic
Counting starts on the falling edge. The counter is cleared and stopped while the MT0IN
MTOUT00/10
MT0IN pin
TMPM380/M382 - 56 / 87 -
Figure 10-16 Trigger input Signal
IGTRGSEL=”0”
MT0IN pin
TMPM380/M382

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