TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 283

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

with PWM. The ADC trigger signal (PMDTRG) is generated by a match between MTPDnMDCNT and
MTPDnTRGCMP. The signal generation timing can be selected from up-count match, down-count match
and up-/down-count match. When the edge-aligned PWM mode is selected, the ADC trigger signal is
generated on an up-count match. When PWM output is disabled (MTPDnMDEN<PWMEN>=0), trigger
output is also disabled.
The sync trigger generation circuit generates trigger signals for starting ADC sampling in synchronization
MTPDn
MTPDn
10.7.3.5
TRGCM P1
RGCMP0
Sync Trigger Generation Circuit
Buffer
Buffer
MTPDn
Fig 10-8 Sync Trigger Generation Circuit
M DCN T
TMPM380/M382 - 83 / 87 -
A=B
A=B
MTPDn
TRGCR
Slope S elect
PWMSync Signal
updn PTENC
TR G1
TRG0
MTPDn
Trig ger Outpu t
TRGMD
Se lect
TMPM380/M382
P MDTRG0
P MDTRG1
P MDTRG2
P MDTRG3