MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 228

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Burst Buffer Controller 2 Module
4.6.2.3
The following registers define protection attributes and size for four memory regions.
4-22
,
1
2
HRESET
HRESET
20:21
22:24
26:27
29:31
G and PP attributes perform similar protection activities on a region. The more protective attribute will be implied on the
region if the attributes programming oppose each other.
This field is available only on the MPC562/MPC564.
0:19
Bits
25
28
Field
Field
Addr
BTBINH
MSB
CMPR
Name
16
Region Attribute Registers (MI_RA[0:3])
0
PP
RS
G
—
—
When the MPC562/MPC564 operates in decompression on mode, a
minimum of four unused words MUST be left after the last instruction in
any region.
1
1
2
17
1
RS
Region size. For byte size by region, see
Protection bits:
00 Supervisor — No Access, User — No Access.
01 Supervisor — Fetch, User — No Access.
1x Supervisor — Fetch, User — Fetch.
Reserved
Guard attribute for region
0 Speculative fetch is not prohibited from region. Region is not guarded.
1 Speculative fetch is prohibited from guarded region. An exception will occur under such attempt.
Compressed Region.
x0 The region in not restricted
01 Region is considered a non-compressed code region. Access to the region is allowed only in
11 Region is considered a compressed code region. Access to the region is allowed only in
BTB Inhibit region
0 BTB operation is not prohibited for current memory region
1 BTB operation is prohibited for current memory region.
Reserved
Undefined
18
“Decompression Off” mode
“Decompression On” mode
2
SPR 816 (MI_RA0), SPR 817 (MI_RA1), SPR 818 (MI_RA2), 819 (MI_RA3)
Figure 4-9. Region Attribute Register (MI_RA0[0:3])
Table 4-6. MI_RA[0:3] Registers Bit Descriptions
19
3
MPC561/MPC563 Reference Manual, Rev. 1.2
20
4
PP
21
5
22
6
NOTE
000
—
23
Unchanged
7
RS
Table
Description
24
8
4-7.
25
G
9
10
26
Undefined
CMPR
11
27
BTBINH
12
28
Freescale Semiconductor
13
29
000
14
30
—
LSB
15
31