MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 917

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 23-2
23.1.1.2
The history buffer flushes status pins denote how many instructions are flushed from the history buffer this
clock due to an
Freescale Semiconductor
1
2
VF[0:2]
Unless next clock VF=111. See below.
The sequential instructions listed here affect the machine in a manner similar to indirect branch instructions. Refer
to
000
001
010
011
100
101
110
111
Section 23.1.3, “Sequential Instructions Marked as Indirect
shows VF[0:2] encodings for instruction queue flush information.
History Buffer Flushes Status Pins— VFLS [0:1]
None
Sequential
Branch (direct or indirect) not taken
VSYNC was asserted/negated and therefore the
next instruction will be marked with the indirect
change-of-flow attribute
Exception taken — the target will be marked with the
indirect change-of-flow attribute
Branch indirect taken, rfi, mtmsr, isync and in some
cases mtspr to CMPA-F, ICTRL, ECR, or DER — the
target will be marked with the indirect change-of-flow
attribute
Branch direct taken
Branch (direct or indirect) not taken
exception.Table 23-3
2
1
VF[0:2]
Refer to
000
001
010
011
100
101
110
111
Instruction Type
Table 23-2. VF Pins Queue Flush Encodings
Table 23-1. VF Pins Instruction Encodings
MPC561/MPC563 Reference Manual, Rev. 1.2
Table
0 instructions flushed from instruction queue
1 instruction flushed from instruction queue
2 instructions flushed from instruction queue
3 instructions flushed from instruction queue
4 instructions flushed from instruction queue
5 instructions flushed from instruction queue
Reserved
Instruction type information
shows VFLS encodings.
23-1.
Queue Flush Information
Branch.”
1
More instruction type information
More instruction type information
More instruction type information
More instruction type information
Queue flush information
Queue flush information
Queue flush information
Queue flush information
VF Next Clock Will Hold
1
1
1
1
Development Support
23-3