MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 68

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14-21
14-22
14-23
14-24
14-25
14-26
15-1
15-2
15-3
15-4
15-5
15-6
15-7
15-8
15-9
15-10
15-11
15-12
15-13
15-14
15-15
15-16
15-17
15-18
15-19
15-20
15-21
15-22
15-23
15-24
15-25
15-26
15-27
15-28
15-29
15-30
15-31
15-32
15-33
lxviii
Table
Number
QADC64E_B Multiplexed Channel Assignments and Signal Designations........................ 14-33
QADC64E Clock Programmability ...................................................................................... 14-50
Trigger Events....................................................................................................................... 14-53
Status Bits ............................................................................................................................. 14-54
External Circuit Settling Time to 1/2 LSB (10-Bit Conversions) ........................................ 14-73
Error Resulting From Input Leakage (IOFF)........................................................................ 14-74
QSMCM Register Map ........................................................................................................... 15-4
QSMCM Global Registers...................................................................................................... 15-6
Interrupt Levels....................................................................................................................... 15-7
QSMCMMCR Bit Descriptions.............................................................................................. 15-9
QDSCI_IL Bit Descriptions.................................................................................................... 15-9
QSPI_IL Bit Descriptions ..................................................................................................... 15-10
QSMCM Pin Control Registers ............................................................................................ 15-10
Effect of DDRQS on QSPI Pin Function.............................................................................. 15-11
QSMCM Pin Functions ........................................................................................................ 15-12
PQSPAR Bit Descriptions .................................................................................................... 15-13
DDRQS Bit Descriptions...................................................................................................... 15-14
QSPI Register Map ............................................................................................................... 15-16
Bits Per Transfer ................................................................................................................... 15-18
SPCR1 Bit Descriptions........................................................................................................ 15-19
QSPI Pin Functions............................................................................................................... 15-25
Example SCK Frequencies with a 40-MHz IMB3 Clock..................................................... 15-35
PCS Enhanced Functionality ................................................................................................ 15-37
SCI Registers ........................................................................................................................ 15-45
SCCxR0 Bit Descriptions ..................................................................................................... 15-46
SCI Pin Functions ................................................................................................................. 15-51
Serial Frame Formats............................................................................................................ 15-52
Examples of SCIx Baud Rates.............................................................................................. 15-53
Effect of Parity Checking on Data Size ................................................................................ 15-53
QSCI1CR Bit Descriptions ................................................................................................... 15-60
QSCI1SR Bit Descriptions ................................................................................................... 15-61
SPCR0 Bit Descriptions....................................................................................................... 15-18
SPCR2 Bit Descriptions....................................................................................................... 15-20
SPCR3 Bit Descriptions....................................................................................................... 15-21
SPSR Bit Descriptions ......................................................................................................... 15-22
Command RAM Bit Descriptions........................................................................................ 15-24
SCCxR1 Bit Descriptions .................................................................................................... 15-47
SCxSR Bit Descriptions....................................................................................................... 15-49
SCxDR Bit Descriptions ...................................................................................................... 15-51
MPC561/MPC563 Reference Manual, Rev. 1.2
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