MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 439
MPC564MZP66
Manufacturer Part Number
MPC564MZP66
Description
IC MCU 512K FLASH 66MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Specifications of MPC564MZP66
Core Processor
PowerPC
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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11.4
The L2U module can operate in the following modes:
11.4.1
In normal mode (master or slave) the L2U module acts as a bidirectional protocol translator.
In addition to the bus protocol translation, the L2U supports other functions such as show cycles, data
memory protection, and MPC500 reservation protocol.
Freescale Semiconductor
•
•
•
•
•
•
Normal mode
Reset operation
Peripheral mode
Factory test mode
In master mode the RCPU is fully operational, and there is no external master access to the U-bus.
Slave mode enables an external master to access any internal bus slave while the RCPU is fully
operational. The L2U transfers load/store accesses from the RCPU to the U-bus and the read/write
accesses by the U-bus master to the L-bus.
Modes Of Operation
Normal Mode
MPC500
Core
FP
+
L-Bus
Figure 11-1. L2U Bus Interface Block Diagram
MPC561/MPC563 Reference Manual, Rev. 1.2
Interface
Burst Buffer
L-Bus
Controller
L-Bus to U-Bus Interface
Reservation
Address
Decode
Control
DMPU
U-Bus
Interface
U-Bus
Interface
UIMB
IMB3
USIU
L-Bus to U-Bus Interface (L2U)
E-Bus
11-3
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