MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 931

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Note that when programming the load/store watchpoints to ignore L-addr events and L-data events, it does
not reduce the load/store watchpoints detection logic to be instruction watchpoint detection logic since the
instruction must be a load/store instruction for the load/store watchpoint event to trigger.
Freescale Semiconductor
Name
LWP0
LWP1
Description
Load/store
watchpoint
Load/store
watchpoint
Second
First
Table 23-8. Load/Store Watchpoints Programming Options
Instruction Events
IWP0, IWP1, IWP2,
IWP0, IWP1, IWP2,
MPC561/MPC563 Reference Manual, Rev. 1.2
ignore instruction
ignore instruction
Programming
Options
events
events
IWP3,
IWP3,
Programming Options
ignore L-addr events
Comparators (E | F)
Comparators (E | F)
ignore I-addr events
Comparators (E&F)
Comparators (E&F)
L-address Events
Comparator E
Comparator F
Comparator E
Comparator F
Programming Options
Comparators (G | H)
ignore L-data events
Comparators (G | H)
ignore L-data events
Comparators (G&H)
Comparators (G&H)
L-data Events
Comparator G
Comparator G
Comparator H
Comparator H
Development Support
23-17