SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 170

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

20.3.2
20.3.3
170
170
SAM9G35
SAM9G35
Bypass the 32,768 Hz Oscillator
Switch from 32,768 Hz Crystal Oscillator to Internal 32 kHz RC Oscillator
The following steps must be added to bypass the 32,768 Hz oscillator:
The same procedure must be followed to switch from the 32,768 Hz crystal oscillator to the inter-
nal 32 kHz RC oscillator:
• Wait 32,768 Hz Startup Time for clock stabilization (software loop).
• Switch from internal 32 kHz RC oscillator to 32,768 Hz oscillator by setting the bit OSCSEL
• Wait 5 slow clock cycles for internal resynchronization.
• Disable the 32 kHz RC oscillator by setting the bit RCEN to 0.
• An external clock must be connected on XIN32.
• Enable the bypass path OSC32BYP bit set to 1.
• Disable the 32,768 Hz oscillator by setting the bit OSC32EN to 0.
• Switch the master clock to a source different from slow clock (PLL or Main Oscillator).
• Enable the internal 32 kHz RC oscillator for low power by setting the bit RCEN to 1
• Wait internal 32 kHz RC Startup Time for clock stabilization (software loop).
• Switch from 32,768 Hz oscillator to internal RC by setting the bit OSCSEL to 0.
• Wait 5 slow clock cycles for internal resynchronization.
• Disable the 32,768 Hz oscillator by setting the bit OSC32EN to 0.
to 1.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11