SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 55

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

11. Boot Strategies
11.1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
ROM Code
The system always boots at address 0x0. To ensure maximum boot possibilities, the memory
layout can be changed thanks to the BMS pin. This allows the user to layout the ROM or an
external memory to 0x0. The sampling of the BMS pin is done at reset.
If BMS is detected at 0, the controller boots on the memory connected to Chip Select 0 of the
External Bus Interface.
In this boot mode, the chip starts with its default parameters (all registers in their reset state),
including as follows:
The user software in the external memory performs a complete configuration:
If BMS is detected at 1, the boot memory is the embedded ROM and the Boot Program
described below is executed.
The ROM Code is a boot program contained in the embedded ROM. It is also called “First level
bootloader”.
The ROM Code performs several steps:
• the main clock is the on-chip 12 MHz RC oscillator
• the Static Memory Controller is configured with its default parameters
• Enable the 32,768 Hz oscillator if best accuracy is needed
• Program the PMC (main oscillator enable or bypass mode)
• Program and Start the PLL
• Reprogram the SMC setup, cycle, hold, mode timing registers for EBI CS0, to adapt them to
• Switch the system clock to the new value
• basic chip initialization: XTal or external clock frequency detection
• attempt to retrieve a valid code from external non-volatile memories (NVM)
• execution of a monitor called SAM-BA Monitor, in case no valid application has been found
the new clock
on any NVM
(Section 11.1 “ROM
Code”)
SAM9G35
SAM9G35
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