SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 56

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
11.2
11.3
56
56
Flow Diagram
Chip Setup
SAM9G35
SAM9G35
The ROM Code implements the algorithm shown below in
Figure 11-1. ROM Code Algorithm Flow Diagram
At boot start-up, the processor clock (PCK) and the master clock (MCK) source is the 12 MHz
Fast RC Oscillator.
Initialization follows the steps described below:
1. Stack setup for ARM supervisor mode.
2. Main Oscillator Detection: the Main Clock is switched to the 32 kHz RC oscillator to
3. Main Clock Selection: the Master Clock source is switched from the Slow Clock to the
4. C variable initialization: non zero-initialized data is initialized in the RAM (copy from
5. PLLA initialization: PLLA is configured to get a PCK at 96 MHz and an MCK at
allow external clock frequency to be measured. Then the Main Oscillator is enabled and
set in bypass mode. If the MOSCSELS bit rises, an external clock is connected, and the
next step is Main Clock Selection (3). If not, the bypass mode is cleared to attempt
external quartz detection. This detection is successful when the MOSCXTS and
MOSCSELS bits rise, else the 12 MHz Fast RC internal oscillator is used as the Main
Clock.
Main Oscillator without prescaler. The PMC Status Register is polled to wait for MCK
Ready. PCK and MCK are now the Main Clock.
ROM to RAM). Zero-initialized data is set to 0 in the RAM.
48 MHz. If an external clock or crystal frequency running at 12 MHz is found, then the
PLLA is configured to allow communication on the USB link for the SAM-BA Monitor;
else the Main Clock is switched to the internal 12 MHz Fast RC, but USB will not be
activated.
Valid boot code
SAM-BA Monitor
No
found in one
Chip Setup
NVM
Yes
in internal SRAM
Copy and run it
Figure
11-1.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11

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