SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 533

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

32.3
Figure 32-3. Block Diagram
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
AHB
AHB
AHB
AHB
Block Diagram
Master
Master
Slave
Slave
Master Block
Master Block
Slave Block
Slave Block
Registers
Registers
OHCI
EHCI
HCI
HCI
HCI
HCI
Control
Control
Access to the USB host operational registers is achieved through the AHB bus slave interface.
The Open HCI host controller and Enhanced HCI host controller initialize master DMA transfers
through the AHB bus master interface as follows:
Memory access errors (abort, misalignment) lead to an “Unrecoverable Error” indicated by the
corresponding flag in the host controller operational registers.
The USB root hub is integrated in the USB host. Several USB downstream ports are available.
The number of downstream ports can be determined by the software driver reading the root
hub’s operational registers. Device connection is automatically detected by the USB host port
logic.
Data
Data
• Fetches endpoint descriptors and transfer descriptors
• Access to endpoint data from system memory
• Access to the HC communication area
• Write status and retire transfer descriptor
List Processor
FIFO 64 x 8
Regsisters
Generator
Processor
ED & TD
Block
SOF
List
Root Hub
Host SIE
Packet
Buffer
FIFO
and
Hub Registers
PORT S/M 0
PORT S/M 1
PORT S/M 2
Root
v2.0 High-speed Transceiver
USB FS transceiver
USB transceiver
USB transceiver
Embedded USB
SAM9G35
SAM9G35
HFSDPA
HFSDMA
HHSDPA
HHSDMA
HFSDPB
HFSDMB
HHSDPB
HHSDMB
HFSDPC
HFSDMC
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