SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 545
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SAM9G10
Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(1274 pages)
2.SAM9261.pdf
(43 pages)
3.SAM9G10.pdf
(750 pages)
4.SAM9G10.pdf
(39 pages)
Specifications of SAM9G10
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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33.6.6
Figure 33-6. Allocation and Reorganization of the DPRAM
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
DPRAM Management
Device:
UDPHS_EPTCTLENBx.EPT_ENABL = 1
UDPHS_EPTCFGx.BK_NUMBER
Endpoints 0..5
Activated
Free Memory
EPT5
EPT4
EPT3
EPT2
EPT1
EPT0
Endpoints can only be allocated in ascending order, from the endpoint 0 to the last endpoint to
be allocated. The user shall therefore configure them in the same order.
The allocation of an endpoint x starts when the Number of Banks field in the UDPHS Endpoint
Configuration Register (UDPHS_EPTCFGx.BK_NUMBER) is different from zero. Then, the
hardware allocates a memory area in the DPRAM and inserts it between the x-1 and x+1 end-
points. The x+1 endpoint memory window slides up and its data is lost. Note that the following
endpoint memory windows (from x+2) do not slide.
Disabling an endpoint, by writing a one to the Endpoint Disable bit in the UDPHS Endpoint Con-
trol Disable Register (UDPHS_EPTCTLDISx.EPT_DISABL), does not reset its configuration:
To free its memory, the user shall write a zero to the UDPHS_EPTCFGx.BK_NUMBER field.
The x+1 endpoint memory window then slides down and its data is lost. Note that the following
endpoint memory windows (from x+2) do not slide.
Figure 33-6 on page 545
example.
• the Endpoint Banks (UDPHS_EPTCFGx.BK_NUMBER),
• the Endpoint Size (UDPHS_EPTCFGx.EPT_SIZE),
• the Endpoint Direction (UDPHS_EPTCFGx.EPT_DIR),
• and the Endpoint Type (UDPHS_EPTCFGx.EPT_TYPE).
1. The endpoints 0 to 5 are enabled, configured and allocated in ascending order. Each
2. The endpoint 3 is disabled, but its memory is kept allocated by the controller.
3. In order to free its memory, its UDPHS_EPTCFGx.BK_NUMBER field is written to zero.
4. If the user chooses to reconfigure the endpoint 3 with a larger size, the controller allo-
endpoint then owns a memory area in the DPRAM.
The endpoint 4 memory window slides down, but the endpoint 5 does not move.
cates a memory area after the endpoint 2 memory area and automatically slides up the
0
Device:
UDPHS_EPTCTLDIS3.EPT_DISABL = 1 UDPHS_EPTCFG3.BK_NUMBER
Endpoint 3
(always allocated)
Disabled
Free Memory
EPT5
EPT4
EPT3
EPT2
EPT1
EPT0
illustrates the allocation and reorganization of the DPRAM in a typical
Device:
Memory Freed
Endpoint 3
EPT4 Lost Memory
Free Memory
EPT5
EPT4
EPT2
EPT1
EPT0
0
Device:
UDPHS_EPTCTLENB3.EPT_ENABL = 1
UDPHS_EPTCFG3.BK_NUMBER
EPT3 (larger size)
Endpoint 3
Activated
Free Memory
EPT4
EPT2
EPT1
EPT0
EPT5
0
SAM9G35
SAM9G35
Conflict
545
545
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