SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 402

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 29-23. TDF Optimization Disabled (TDF Mode = 0). TDF wait states between 2 read accesses on different chip
Figure 29-24. TDF Mode = 0: TDF wait states between a read and a write access on different chip selects
402
402
read1 controlling signal
read2 controlling signal
write2 controlling signal
read1 controlling signal
NBS0, NBS1,
NBS2, NBS3,
A0, A1
NBS0, NBS1,
NBS2, NBS3,
A0, A1
SAM9G35
SAM9G35
A
[25:2]
D[31:0]
A[
D[31:0]
(NRD)
(NRD)
(NWE)
(NRD)
selects
MCK
25:2]
MCK
TDF_CYCLES = 6
TDF_CYCLES = 4
read1 cycle
read1 cycle
read1 hold = 1
read1 hold = 1
Chip Select Wait State
TDF_CYCLES = 4
Read to Write
Wait State
TDF_CYCLES = 6
Chip Select
Wait State
2 TDF WAIT STATES
5 TDF WAIT STATES
write2 setup = 1
(optimization disabled)
TDF_MODE = 0
write2 cycle
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
(optimization disabled)
TDF_MODE = 0
read2 setup = 1
read 2 cycle