SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 640

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

34.14.2
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CLKDIV: Clock Divider
High Speed MultiMedia Card Interface clock (MCCK or HSMCI_CK) is Master Clock (MCK) divider by
({CLKDIV,CLKODD}+2).
• PWSDIV: Power Saving Divider
High Speed MultiMedia Card Interface clock is divided by 2
Warning: This value must be different from 0 before enabling the Power Save Mode in the HSMCI_CR (HSMCI_PWSEN
bit).
• RDPROOF Read Proof Enable
Enabling Read Proof allows to stop the HSMCI Clock during read access if the internal FIFO is full. This will guarantee data
integrity, not bandwidth.
0 = Disables Read Proof.
1 = Enables Read Proof.
• WRPROOF Write Proof Enable
Enabling Write Proof allows to stop the HSMCI Clock during write access if the internal FIFO is full. This will guarantee data
integrity, not bandwidth.
0 = Disables Write Proof.
1 = Enables Write Proof.
• FBYTE: Force Byte Transfer
Enabling Force Byte Transfer allow byte transfers, so that transfer of blocks with a size different from modulo 4 can be
supported.
Warning: BLKLEN value depends on FBYTE.
0 = Disables Force Byte Transfer.
1 = Enables Force Byte Transfer.
640
640
31
23
15
–
–
–
7
SAM9G35
SAM9G35
HSMCI Mode Register
PADV
30
22
14
HSMCI_MR
0xF0008004 (0), 0xF000C004 (1)
Read-write
–
–
6
FBYTE
29
21
13
–
–
5
WRPROOF
28
20
12
–
–
4
CLKDIV
(PWSDIV)
“HSMCI Write Protect Mode Register” on page
RDPROOF
+ 1 when entering Power Saving Mode.
27
19
11
–
–
3
26
18
10
–
–
2
PWSDIV
25
17
–
–
9
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
664.
CLKODD
24
16
–
8
0