SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 914

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

41.5
41.5.1
41.5.2
41.5.3
41.5.4
914
Product Dependencies
SAM9G35
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
The ADC Controller is not continuously clocked. The programmer must first enable the ADC
Controller MCK in the Power Management Controller (PMC) before using the ADC Controller.
However, if the application does not require ADC operations, the ADC Controller clock can be
stopped when not needed and restarted when necessary. Configuring the ADC Controller does
not require the ADC Controller clock to be enabled.
The ADC interrupt line is connected on one of the internal sources of the Interrupt Controller.
Using the ADC interrupt requires the interrupt controller to be programmed first.
Table 41-2.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the ADC
input is automatically done as soon as the corresponding channel is enabled by writing the reg-
ister ADC_CHER. By default, after reset, the PIO line is configured as input with its pull-up
enabled and the ADC input is connected to the GND.
The pin ADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin ADTRG to the ADC
function.
Table 41-3.
Instance
Instance
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
Peripheral IDs
I/O Lines
19
ID
ADTRG
Signal
AD10
AD11
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
I/O Line
PB18
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB10
PB6
PB7
PB8
PB9
Peripheral
11053B–ATARM–22-Sep-11
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
B