MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1126

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map and Register Descriptions
43.3.3 I2C Control Register 1 (I2Cx_C1)
Addresses: I2C0_C1 is 4006_6000h base + 2h offset = 4006_6002h
1126
MULT
IICEN
Field
Reset
Field
ICR
7–6
5–0
Read
Write
7
Bit
I2C1_C1 is 4006_7000h base + 2h offset = 4006_7002h
IICEN
The MULT bits define the multiplier factor mul. This factor is used along with the SCL divider to generate
the I2C baud rate.
00
01
10
11
Clock rate
Prescales the bus clock for bit rate selection. This field and the MULT field determine the I2C baud rate,
the SDA hold time, the SCL start hold time, and the SCL stop hold time. For a list of values corresponding
to each ICR setting, see
The SCL divider multiplied by multiplier factor (mul) determines the I2C baud rate.
I2C baud rate = bus speed (Hz)/(mul × SCL divider)
The SDA hold time is the delay from the falling edge of SCL (I2C clock) to the changing of SDA (I2C
data).
SDA hold time = bus period (s) × mul × SDA hold value
The SCL start hold time is the delay from the falling edge of SDA (I2C data) while SCL is high (start
condition) to the falling edge of SCL (I2C clock).
SCL start hold time = bus period (s) × mul × SCL start hold value
The SCL stop hold time is the delay from the rising edge of SCL (I2C clock) to the rising edge of SDA (I2C
data) while SCL is high (stop condition).
SCL stop hold time = bus period (s) × mul × SCL stop hold value
I2C enable
Enables I2C module operation.
7
0
mul = 1
mul = 2
mul = 4
Reserved
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
IICIE
0
6
I2C Divider and Hold
I2Cx_C1 field descriptions
Table continues on the next page...
I2Cx_F field descriptions
MST
0
5
TX
0
4
Values.
Description
Description
TXAK
0
3
RSTA
0
0
2
Freescale Semiconductor, Inc.
WUEN
0
1
DMAEN
0
0