MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 934

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory map and register definition
38.3.1 Low Power Timer Control Status Register (LPTMRx_CSR)
Addresses: LPTMR0_CSR is 4004_0000h base + 0h offset = 4004_0000h
934
Reset
Reset
Bit
Bit
W
W
Reserved
R
R
31–8
Field
TCF
TPS
TPP
5–4
TIE
7
6
3
31
15
0
0
30
14
0
0
This read-only field is reserved and always has the value zero.
Timer Compare Flag
The timer compare flag is set when the LPTMR is enabled and the LPTMR Counter Register equals the
LPTMR Compare Register and increments. This Timer Compare Flag is cleared when the LPTMR is
disabled or a logic one is written to the Timer Compare Flag.
0
1
Timer Interrupt Enable
When the Timer Interrupt Enable is set, the LPTMR Interrupt is generated whenever the Timer Compare
Flag is also set.
0
1
Timer Pin Select
The Timer Pin Select configures the input source to be used in Pulse Counter mode. The Timer Pin
Select should only be altered when the LPTMR is disabled. The input connections vary by device. See the
Chip Configuration details for information on the connections to these inputs.
00
01
10
11
Timer Pin Polarity
LPTMR Counter Register has not equaled the LPTMR Compare Register and incremented
LPTMR Counter Register has equaled the LPTMR Compare Register and incremented
Timer Interrupt Disabled.
Timer Interrupt Enabled.
29
13
Pulse counter input 0 is selected.
Pulse counter input 1 is selected.
Pulse counter input 2 is selected.
Pulse counter input 3 is selected.
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
0
27
11
0
0
LPTMRx_CSR field descriptions
Table continues on the next page...
26
10
0
0
25
0
0
9
24
0
0
8
0
Description
TCF
w1c
23
0
0
7
TIE
22
0
0
6
21
0
0
5
TPS
20
0
0
4
Freescale Semiconductor, Inc.
TPP
19
0
0
3
TFC
18
0
0
2
17
0
0
1
TEN
16
0
0
0

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