MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 237

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Reset
11.4.3 Global Pin Control High Register (PORTx_GPCHR)
Addresses: PORTA_GPCHR is 4004_9000h base + 84h offset = 4004_9084h
11.4.4 Interrupt Status Flag Register (PORTx_ISFR)
The pin interrupt configuration is valid in all digital pin muxing modes. The Interrupt
Status Flag for each pin is also visible in the corresponding Pin Control Register, and
each flag can be cleared in either location.
Addresses: PORTA_ISFR is 4004_9000h base + A0h offset = 4004_90A0h
Freescale Semiconductor, Inc.
Bit
Bit
W
W
R
R
31
31
0
0
GPWD
GPWE
31–16
15–0
Field
30
30
0
0
PORTB_GPCHR is 4004_A000h base + 84h offset = 4004_A084h
PORTC_GPCHR is 4004_B000h base + 84h offset = 4004_B084h
PORTD_GPCHR is 4004_C000h base + 84h offset = 4004_C084h
PORTE_GPCHR is 4004_D000h base + 84h offset = 4004_D084h
PORTB_ISFR is 4004_A000h base + A0h offset = 4004_A0A0h
PORTC_ISFR is 4004_B000h base + A0h offset = 4004_B0A0h
PORTD_ISFR is 4004_C000h base + A0h offset = 4004_C0A0h
PORTE_ISFR is 4004_D000h base + A0h offset = 4004_D0A0h
29
29
0
0
28
28
0
0
Global Pin Write Enable
When set, causes bits [15:0] of the corresponding Pin Control Register (31 through 16) to update with the
value in the Global Pin Write Data field.
Global Pin Write Data
Value to be written to bits [15:0] of all Pin Control Registers that are enabled by the Global Pin Write
Enable field, provided the corresponding register has not been locked.
27
27
0
0
26
26
0
0
25
25
0
0
GPWE
24
24
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
23
23
0
0
PORTx_GPCHR field descriptions
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
16
16
0
0
w1c
ISF
15
15
0
0
Description
14
14
0
0
13
13
0
0
Chapter 11 Port control and interrupts (PORT)
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
GPWD
0
0
8
8
0
0
0
7
7
0
0
6
6
0
0
5
5
4
0
4
0
0
0
3
3
0
0
2
2
0
0
1
1
237
0
0
0
0