MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 674

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Register Definition
31.3.7 Status and control register 3 (ADCx_SC3)
The SC3 register controls the calibration, continuous convert, and hardware averaging
functions of the ADC module.
Addresses: ADC0_SC3 is 4003_B000h base + 24h offset = 4003_B024h
674
Reset
Reset
Bit
Bit
W
W
Reserved
R
R
CALF
31–8
Field
Field
CAL
7
6
31
15
0
0
ADC1_SC3 is 400B_B000h base + 24h offset = 400B_B024h
30
14
0
0
00
01
10
11
This read-only field is reserved and always has the value zero.
Calibration
CAL begins the calibration sequence when set. This bit stays set while the calibration is in progress and is
cleared when the calibration sequence is completed. The CALF bit must be checked to determine the
result of the calibration sequence. Once started, the calibration routine cannot be interrupted by writes to
the ADC registers or the results will be invalid and the CALF bit will set. Setting the CAL bit will abort any
current conversion.
Calibration failed flag
CALF displays the result of the calibration sequence. The calibration sequence will fail if ADTRG = 1, any
ADC register is written, or any stop mode is entered before the calibration sequence completes. The
CALF bit is cleared by writing a 1 to this bit.
Default voltage reference pin pair (external pins V
Alternate reference pair (V
sources depending on MCU configuration. Consult the Chip Configuration information for details
specific to this MCU.
Reserved
Reserved
29
13
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
ADCx_SC2 field descriptions (continued)
0
27
11
0
0
ADCx_SC3 field descriptions
Table continues on the next page...
26
10
0
0
ALTH
25
0
0
9
and V
24
ALTL
0
0
8
0
). This pair may be additional external pins or internal
Description
Description
CAL
23
0
0
7
REFH
CALF
22
0
0
6
and V
21
0
0
5
REFL
0
)
20
0
0
4
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
AVGS
16
0
0
0