MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 783

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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35.4.6 Interrupts
PDB can generate two interrupts, PDB interrupt and PDB sequence error interrupt. The
following table summarizes the interrupts.
35.4.7 DMA
If SC[DMAEN] is set, PDB can generate DMA transfer request when SC[PDBIF] is set.
When DMA is enabled, the PDB interrupt will not be issued.
35.5 Application Information
35.5.1 Impact of Using the Prescaler and Multiplication Factor on
Use of prescaler and multiplication factor greater than 1 limits the count/delay accuracy
in terms of peripheral clock cycles (to the modulus of the prescaler X multiplication
factor). If the multiplication factor is set to 1 and the prescaler is set to 2 then the only
Freescale Semiconductor, Inc.
PDB Counter
SC[LDOK]
Ch n pre-trigger 0
Ch n pre-trigger 1
Timing Resolution
CHnDLY1
CHnDLY0
PDB Sequence Error Interrupt
PDB Interrupt
Figure 35-55. Registers Update with SC[LDMOD] = x1
Interrupt
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 35-55. PDB Interrupt Summary
CHnS[ERRm]
SC[PDBIF]
Flags
Chapter 35 Programmable Delay Block (PDB)
SC[PDBIE] = 1 and
SC[DMAEN] = 0
SC[PDBEIE] = 1
Enable Bit
783

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