MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 613

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

1. Must be longword aligned (Flash address [1:0] = 00).
After clearing CCIF to launch the Read 1s Block command, the FTFL sets the read
margin for 1s according to
program flash block.
28.4.10.2 Read 1s Section Command
The Read 1s Section command checks if a section of program flash memory is erased to
the specified read margin level. The Read 1s Section command defines the starting
address and the number of phrases to be verified.
Freescale Semiconductor, Inc.
Command not available in current mode/security
An invalid margin choice is specified
Program flash is selected and the address is out of program flash range
Flash address is not longword aligned
Read-1s fails
Error Condition
FCCOB Number
Read Margin Choice
FCCOB Number
Table 28-27. Read 1s Block Command FCCOB Requirements (continued)
0
1
2
3
4
5
0x00
0x01
0x02
3
4
Table 28-30. Read 1s Section Command FCCOB Requirements
Table 28-29. Read 1s Block Command Error Handling
Table 28-28. Margin Level Choices for Read 1s Block
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 28-28
Table continues on the next page...
Flash address [23:16] of the first phrase to be verified
Flash address [15:8] of the first phrase to be verified
Flash address [7:0]
Apply the 'Factory' margin to the normal read-1 level
Apply the 'User' margin to the normal read-1 level
and then reads all locations within the selected
Flash address [7:0]
Number of phrases to be verified [15:8]
Number of phrases to be verified [7:0]
Use the 'normal' read level for 1s
FCCOB Contents [7:0]
Margin Level Description
0x01 (RD1SEC)
1
FCCOB Contents [7:0]
Read-1 Margin Choice
of the first phrase to be verified
1
in the flash block to be verified
Chapter 28 Flash Memory Module (FTFL)
FSTAT[MGSTAT0]
FSTAT[ACCERR]
FSTAT[ACCERR]
FSTAT[ACCERR]
FSTAT[ACCERR]
Error Bit
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