MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 532

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Initialization / Application Information
Before the ATM can be enabled, the ATM expected count needs to get derived and stored
into the ATCV register. The ATCV expected count is derived based on the required
target Internal Reference Clock (IRC) frequency, the frequency of the external reference
clock, and using the following formula:
If the auto trim is being performed on the 4 MHz IRC, the calculated expected count
value must be multiplied by 128 before storing it in the ATCV register. Therefore, the
ATCV Expected Count Value for trimming the 4 MHz IRC is calculated using the
following formula.
24.5 Initialization / Application Information
This section describes how to initialize and configure the MCG module in an application.
The following sections include examples on how to initialize the MCG and properly
switch between the various available modes.
24.5.1 MCG Module Initialization Sequence
The MCG comes out of reset configured for FEI mode. The internal reference will
stabilize in t
reference is stable, the FLL will acquire lock in t
24.5.1.1 Initializing the MCG
Because the MCG comes out of reset in FEI mode, the only MCG modes that can be
directly switched to upon reset are FEE, FBE, and FBI modes (see
Reaching any of the other modes requires first configuring the MCG for one of these
three intermediate modes. Care must be taken to check relevant status bits in the MCG
status register reflecting all configuration changes within each mode.
To change from FEI mode to FEE or FBE modes, follow this procedure:
532
1. Enable the external clock source by setting the appropriate bits in C2 register.
• Fr = Target Internal Reference Clock (IRC) Trimmed Frequency
• Fe = External Clock Frequency
irefsts
microseconds before the FLL can acquire lock. As soon as the internal
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
ATCV
fll_acquire
milliseconds.
(128)
Figure
Freescale Semiconductor, Inc.
24-12).