MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 839
MK30DN512ZVLK10
Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet
1.MK30DN512ZVLK10.pdf
(1547 pages)
Specifications of MK30DN512ZVLK10
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT
Available stocks
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36.3.26 FTM Software Output Control (FTMx_SWOCTRL)
This register enables software control of channel (n) output and defines the value forced
to the channel (n) output:
This register has a write buffer. The fields are updated by the SWOCTRL register
synchronization.
Addresses: FTM0_SWOCTRL is 4003_8000h base + 94h offset = 4003_8094h
Freescale Semiconductor, Inc.
Reset
Reset
• The CHnOC bits enable the control of the corresponding channel (n) output by
• The CHnOCV bits select the value that is forced at the corresponding channel (n)
Bit
Bit
W
W
Reserved
R
R
INV0EN
software.
output.
31–16
Field
Field
0
31
15
0
0
FTM1_SWOCTRL is 4003_9000h base + 94h offset = 4003_9094h
FTM2_SWOCTRL is 400B_8000h base + 94h offset = 400B_8094h
30
14
0
0
0
1
Pair Channels 0 Inverting Enable
0
1
This read-only field is reserved and always has the value zero.
Inverting is disabled.
Inverting is enabled.
Inverting is disabled.
Inverting is enabled.
29
13
0
0
FTMx_INVCTRL field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
FTMx_SWOCTRL field descriptions
27
11
0
0
Table continues on the next page...
26
10
0
0
25
0
0
9
24
0
0
8
0
Description
Description
23
0
0
7
22
0
0
6
21
0
0
5
20
0
0
4
Chapter 36 FlexTimer (FTM)
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0
839
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