MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 59

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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2.3.8 Communication interfaces
The following communication interfaces are available on this device:
Freescale Semiconductor, Inc.
Periodic interrupt timers (PIT)
Low-power timer (LPTimer)
Carrier modulator timer (CMT)
Real-time clock (RTC)
Controller Area Network (CAN)
Serial peripheral interface (SPI)
Inter-integrated circuit (I2C)
Universal asynchronous receiver/
transmitters (UART)
Secure Digital host controller (SDHC)
I2S
Module
Module
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 2-8. Timer modules (continued)
Table 2-9. Communication modules
Supports the full implementation of the CAN Specification Version 2.0, Part B
Synchronous serial bus for communication to an external device
Allows communication between a number of devices. Also supports the System
Management Bus (SMBus) Specification, version 2.
Asynchronous serial bus communication interface with programmable 8- or 9-bit
data format and support of ISO 7816 smart card interface
Interface between the host system and the SD, SDIO, MMC, or CE-ATA cards.
The SDHC acts as a bridge, passing host bus transactions to the cards by sending
commands and performing data accesses to/from the cards. It handles the SD,
SDIO, MMC, and CE-ATA protocols at the transmission level.
The I
variety of serial devices, such as standard codecs, digital signal processors
(DSPs), microprocessors, peripherals, and audio codecs that implement the inter-
IC sound bus (I
• Four general purpose interrupt timers
• Interrupt timers for triggering ADC conversions
• 32-bit counter resolution
• Clocked by system clock frequency
• DMA support
• Selectable clock for prescaler/glitch filter of 1 kHz (internal LPO), 32.768 kHz
• Configurable Glitch Filter or Prescaler with 16-bit counter
• 16-bit time or pulse counter with compare
• Interrupt generated on Timer Compare
• Hardware trigger generated on Timer Compare
• Four CMT modes of operation:
• Extended space operation in time, baseband, and FSK modes
• Selectable input clock divider
• Interrupt on end of cycle with the ability to disable CMT_IRO pin and use as
• DMA support
• Independent power supply, POR, and 32 kHz Crystal Oscillator
• 32-bit seconds counter with 32-bit Alarm
• 16-bit Prescaler with compensation that can correct errors between 0.12
2
(external crystal), or internal reference clock
timer interrupt
ppm and 3906 ppm
S is a full-duplex, serial port that allows the chip to communicate with a
• Time with independent control of high and low times
• Baseband
• Frequency shift key (FSK)
• Direct software control of CMT_IRO pin
2
S) and the Intel
®
AC97 standards
Description
Description
Chapter 2 Introduction
59

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