MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1355

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number:
MK30DN512ZVLK10
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Quantity:
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The following figure shows an example of the port signals for an 8-bit data transfer.
Continuous and gated clock signals are shown, as well as the bit-length frame sync signal
and the word-length frame sync signal.
Freescale Semiconductor, Inc.
Figure 46-2. Asynchronous (SYN = 0) I
I2S external continuous clock for RX
I2S internal continuous clock for TX/RX (RCR[RXDIR] = 1,TCR[TXDIR] = 1,
RCR[RFDIR] = 1,TCR[TFDIR] = 1, CR[SYN] = 0)
I2S external continuous clock for TX/RX (RCR[RXDIR] = 0,TCR[TXDIR] = 0,
RCR[RFDIR] = 0,TCR[TFDIR] = 0, CR[SYN] = 0)
I2S internal continuous clock for RX (RCR[RXDIR] = 1, TCR[TXDIR] = 0,
RCR[RFDIR] = 1,TCR[TFDIR] = 0, CR[SYN] = 0)
I2S external continuous clock for TX
I2S internal continuous clock for TX (RCR[RXDIR] = 0, TCR[TXDIR] = 1,
RCR[RFDIR] = 0, TCR[TFDIR] = 1, CR[SYN] = 0)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
I2S
I2S
I2S
I2S
SRXD
STCK
STFS
SRCK
SRFS
STXD
SRXD
SRCK
STXD
STCK
STFS
SRFS
STFS
STXD
SRXD
STCK
SRCK
SRFS
STXD
STFS
SRCK
SRXD
STCK
STCK
SRFS
2
S configurations—continuous clock
Chapter 46 Integrated interchip sound (I2S)
1355

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