MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 121

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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3.8.2.10 FTM BDM and debug halt mode
In the FTM chapter, references to the chip being in "BDM" are the same as the chip being
in “debug halt mode".
3.8.3 PIT Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Freescale Semiconductor, Inc.
System memory map
Power management
Full description
Clocking
Topic
FTM0
CONF Register
GTBEOUT = 1
GTBEEN = 1
Table 3-54. Reference links to related information
Figure 3-41. FTM Global Time Base Configuration
Related module
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
FTM Counter
PIT
Figure 3-42. PIT configuration
gtb_out
gtb_in
Periodic interrupt
Peripheral
timer
bridge
Register
access
gtb_in
gtb_in
FTM1
FTM2
CONF Register
CONF Register
GTBEOUT = 0
GTBEEN = 1
GTBEOUT = 0
GTBEEN = 1
System memory map
Power management
Clock Distribution
Reference
PIT
Chapter 3 Chip Configuration
FTM Counter
FTM Counter
121

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