MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 969

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Write accesses to any register by non-supervisor mode software, when the supervisor
access bit in the control register is clear, will terminate with a bus error.
Read accesses by non-supervisor mode software complete as normal.
Writing to a register protected by the write access register or lock register does not
generate a bus error, but the write will not complete.
Reading a register protected by the read access register does not generate a bus error, but
the register will read zero.
40.2.1 RTC Time Seconds Register (RTC_TSR)
Address: RTC_TSR is 4003_D000h base + 0h offset = 4003_D000h
Freescale Semiconductor, Inc.
Bit
W
R
4003_D00C
4003_D01C
4003_D000
4003_D004
4003_D008
4003_D010
4003_D014
4003_D018
4003_D800
4003_D804
Absolute
address
(hex)
31
0
30
0
29
0
RTC Time Seconds Register (RTC_TSR)
RTC Time Prescaler Register (RTC_TPR)
RTC Time Alarm Register (RTC_TAR)
RTC Time Compensation Register (RTC_TCR)
RTC Control Register (RTC_CR)
RTC Status Register (RTC_SR)
RTC Lock Register (RTC_LR)
RTC Interrupt Enable Register (RTC_IER)
RTC Write Access Register (RTC_WAR)
RTC Read Access Register (RTC_RAR)
28
0
27
0
26
0
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
Register name
22
0
21
0
20
0
RTC memory map
19
0
18
0
17
0
16
0
TSR
15
0
14
0
13
0
12
0
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
11
0
10
0
Access
0
9
Chapter 40 Real Time Clock (RTC)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
8
0
7
0000_00FFh
0000_00FFh
0000_00FFh
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0001h
0000_0007h
0
6
0
5
4
0
0
3
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