MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 702

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Initialization information
31.4.11.2 Normal Stop mode with ADACK enabled
If ADACK is selected as the conversion clock, the ADC continues operation during
Normal Stop mode. Refer to the Chip Configuration chapter for configuration
information for this MCU.
If a conversion is in progress when the MCU enters Normal Stop mode, it continues until
completion. Conversions can be initiated while the MCU is in Normal Stop mode by
means of the hardware trigger or if continuous conversions are enabled.
If the compare and hardware averaging functions are disabled, a conversion complete
event sets the COCO and generates an ADC interrupt to wake the MCU from Normal
Stop mode if the respective ADC interrupt is enabled (AIEN = 1). The result register will
contain the data from the first completed conversion that occurred during Normal Stop
mode. If the hardware averaging function is enabled, the COCO will set (and generate an
interrupt if enabled) when the selected number of conversions are completed. If the
compare function is enabled, the COCO will set (and generate an interrupt if enabled)
only if the compare conditions are met. If a single conversion is selected and the compare
is not true, the ADC will return to its idle state and cannot wake the MCU from Normal
Stop mode unless a new conversion is initiated by another hardware trigger.
31.4.12 MCU Low Power Stop mode operation
The ADC module is automatically disabled when the MCU enters Low Power Stop
mode. All module registers contain their reset values following exit from Low Power
Stop mode. Therefore, the module must be re-enabled and re-configured following exit
from Low Power Stop mode.
31.5 Initialization information
This section gives an example that provides some basic direction on how to initialize and
configure the ADC module. You can configure the module for 16-bit, 12-bit, 10-bit, or 8-
bit single-ended resolution or 16-bit, 13-bit, 11-bit, or 9-bit differential resolution, single
or continuous conversion, and a polled or interrupt approach, among many other options.
Refer to
example.
702
Table
For the chip specific modes of operation, refer to the Power
Management information for the device.
31-110,
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table
31-111, and
NOTE
Table 31-112
for information used in this
Freescale Semiconductor, Inc.

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