MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 868

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional Description
If HWTRIGMODE = 1 then the TRIGn bit is only cleared when 0 is written to it.
36.4.11.2 Software Trigger
A software trigger event occurs when 1 is written to the SYNC[SWSYNC] bit. The
SWSYNC bit is cleared when 0 is written to it or when the PWM synchronization
(initiated by the software event) is completed.
If a new software trigger event occurs (write 1 to SWSYNC bit) together with the end of
the previous synchronization (also initiated by the software trigger event) then this new
synchronization is started and SWSYNC bit remains equal to 1.
If SYNCMODE = 0 then the SWSYNC bit is also cleared by FTM according to
PWMSYNC and REINIT bits. In this case if (PWMSYNC = 1) or (PWMSYNC = 0 and
REINIT = 0) then SWSYNC bit is cleared at the next selected loading point
Cycle and Loading
following figure). If (PWMSYNC = 0) and (REINIT = 1) then SWSYNC bit is cleared
when the software trigger event occurs.
If SYNCMODE = 1 then the SWSYNC bit is also cleared by FTM according to the
SWRSTCNT bit. If SWRSTCNT = 0 then SWSYNC bit is cleared at the next selected
loading point after that the software trigger event occurred (see the following figure). If
SWRSTCNT = 1 then SWSYNC bit is cleared when the software trigger event occurs.
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Note
All hardware trigger inputs have the same behavior.
synchronized trigger_0
It is expected that the HWTRIGMODE bit be 1 only with
enhanced PWM synchronization (SYNCMODE = 1).
Figure 36-205. Hardware Trigger Event with HWTRIGMODE = 0
write 1 to TRIG0 bit
by system clock
trigger_0 input
trigger 0 event
system clock
Points) after that the software trigger event occurred (see the
TRIG0 bit
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
NOTE
Freescale Semiconductor, Inc.
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