MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 296

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Mode Control Memory Map/Register Definition
13.2.4 Power Mode Control Register (MC_PMCTRL)
The PMCTRL register is used to enter the wait, low power, or low leakage modes
provided the selected power mode is allowed via appropriate setting of the protection
register (PMPROT).
If the MCU is configured for a disallowed power mode or to a reserved RUNM setting,
the device remains in its current power mode. For example, if in normal run (RUNM =
00, AVLP = 0) an attempt to enter VLPR using the PMCTRL[RUNM] bits is blocked
and RUNM bits remain 00 indicating the device is still in normal run mode.
Before configuring the LPLLSM bits, the corresponding allow bit in PMPROT must be
set. Writes to LPLLSM that do not meet this criteria are ignored.
A successful write to PMPROT clears the LPLLSM bits. The state of
PMCTRL[LPLLSM] prior to clearing due to update of PMPROT indicates which power
mode was exited and should be used by initialization software for proper power mode
recovery.
296
AVLLS2
AVLLS1
Field
1
0
The reset value of this register depends on the reset type:
0
1
Allow very low leakage stop 2 mode
This write once bit allows the MCU to enter very low leakage stop 2 mode (VLLS2) provided the
appropriate control bits are set up in PMCTRL.
0
1
Allow very low leakage stop 1 mode
This write once bit allows the MCU to enter very low leakage stop 1 mode (VLLS1) provided the
appropriate control bits are set up in PMCTRL.
0
1
• Low-leakage wake-up (LLS exit via RESET pin or any exit
• Other reset — 0x00
VLLS3 is not allowed
VLLS3 is allowed
VLLS2 is not allowed
VLLS2 is allowed
VLLS1 is not allowed
VLLS1 is allowed
from VLLS) — bits 2-0 unaffected
MC_PMPROT field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
NOTE
Description
Freescale Semiconductor, Inc.