MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 902

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional Description
36.4.24.2 Continuous Capture Mode
The continuous capture mode is selected when (FTMEN = 1), (DECAPEN = 1), and
(MS(n)A = 1). In this capture mode, the edges at the channel (n) input are captured
continuously. The ELS(n)B:ELS(n)A bits select the initial edge to be captured, and
ELS(n+1)B:ELS(n+1)A bits select the final edge to be captured.
The edge captures are enabled while DECAP bit is set. For the initial use, first the
CH(n)F and CH(n+1)F bits must be cleared, and then DECAP bit must be set to start the
continuous measurements.
When the CH(n+1)F bit is set, both edges were captured and the captured values are
ready for reading in the C(n)V and C(n+1)V registers. The latest captured values are
always available in these registers even after the DECAP bit is cleared.
In this mode, it is possible to clear only the CH(n+1)F bit. Therefore, when the CH(n+1)F
bit is set again, the latest captured values are available in C(n)V and C(n+1)V registers.
For a new sequence of the measurements in the dual edge capture – continuous mode, it
is recommended to clear the CH(n)F and CH(n+1)F bits to start new measurements.
36.4.24.3 Pulse Width Measurement
If the channel (n) is configured to capture rising edges (ELS(n)B:ELS(n)A = 0:1) and the
channel (n+1) to capture falling edges (ELS(n+1)B:ELS(n+1)A = 1:0), then the positive
polarity pulse width is measured. If the channel (n) is configured to capture falling edges
(ELS(n)B:ELS(n)A = 1:0) and the channel (n+1) to capture rising edges (ELS(n
+1)B:ELS(n+1)A = 0:1), then the negative polarity pulse width is measured.
The pulse width measurement can be made in one-shot capture mode
(One-Shot Capture
Mode) or continuous capture mode
(Continuous Capture
Mode).
The following figure shows an example of the dual edge capture – one-shot mode used to
measure the positive polarity pulse width. The DECAPEN bit selects the dual edge
capture mode, so it keeps set in all operation mode. The DECAP bit is set to enable the
measurement of next positive polarity pulse width. The CH(n)F bit is set when the first
edge of this pulse is detected, that is, the edge selected by ELS(n)B:ELS(n)A bits. The
CH(n+1)F bit is set and DECAP bit is cleared when the second edge of this pulse is
detected, that is, the edge selected by ELS(n+1)B:ELS(n+1)A bits. Both DECAP and
CH(n+1)F bits indicate when two edges of the pulse were captured and the C(n)V and
C(n+1)V registers are ready for reading.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
902
Freescale Semiconductor, Inc.