MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 752

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional Description
33.5.1.4 Buffer One-time Scan Mode
The read pointer increases by one every time when the trigger occurs. When it reaches
the upper limit, it stops at there. If read pointer is reset to the address other than the upper
limit, it will increase to the upper address and stop at there again.
33.5.2 DMA Operation
When DMA is enabled, interrupt requests are not generated. DMA requests are generated
instead. DMA done signal clears the DMA request.
The status register flags are still set and are cleared automatically when the DMA
completes.
33.5.3 Resets
During reset the DAC is configured in the default mode. DAC is disabled.
33.5.4 Low Power Mode Operation
This section describes the wait mode and the stop mode operation of the DAC module.
33.5.4.1 Wait Mode Operation
In wait mode, the DAC will operate normally if enabled.
33.5.4.2 Stop Mode Operation
The DAC continues to operate in Normal Stop mode if enabled, the output voltage will
hold the value before stop.
In Low Power Stop modes, the DAC is fully shut-down.
752
If the software set the read pointer to the upper limit, the read
pointer will not advance in this mode.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Note
Freescale Semiconductor, Inc.