MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 127

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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3.9.1.3 FlexCAN Clocking
3.9.1.3.1 Clocking Options
The FlexCAN module has a register bit CANCTRL[CLK_SRC] that selects between
clocking the FlexCAN from the internal bus clock or the input clock (EXTAL).
3.9.1.3.2 Clock Gating
The clock to each CAN module can be gated on and off using the SCGCn[CANx] bits.
These bits are cleared after any reset, which disables the clock to the corresponding
module. The appropriate clock enable bit should be set by software at the beginning of
the FlexCAN initialization routine to enable the module clock before attempting to
initialize any of the FlexCAN registers.
3.9.1.4 FlexCAN Interrupts
The FlexCAN has multiple sources of interrupt requests. However, some of these sources
are OR'd together to generate a single interrupt request. See below for the mapping of the
individual interrupt sources to the interrupt request:
3.9.1.5 FlexCAN Operation in Low Power Modes
The FlexCAN module is operational in VLPR and VLPW modes. With the 2 MHz bus
clock, the fastest supported FlexCAN transfer rate is 256 kbps. The bit timing parameters
in the module must be adjusted for the new frequency, but full functionality is possible.
Freescale Semiconductor, Inc.
Message buffer
Bus off
Error
Transmit Warning
Receive Warning
Wake-up
Request
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Message buffers 0-15
Bus off
Transmit Warning
Receive Warning
Wake-up
Sources
• Bit1 error
• Bit0 error
• Acknowledge error
• Cyclic redundancy check (CRC) error
• Form error
• Stuffing error
• Transmit error warning
• Receive error warning
Chapter 3 Chip Configuration
127

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