MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 516

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map/Register Definition
24.3.3 MCG Control 3 Register (MCG_C3)
Address: MCG_C3 is 4006_4000h base + 2h offset = 4006_4002h
* Notes:
•
1. A value for SCTRIM is loaded during reset from a factory programmed location .
516
x = Undefined at reset.
SCTRIM
IRCS
Field
Reset
Field
Read
7–0
Write
0
Bit
0
1
Internal Reference Clock Select
Selects between the fast or slow internal reference clock source.
0
1
Slow Internal Reference Clock Trim Setting
SCTRIM
clock period. The SCTRIM bits are binary weighted (that is, bit 1 adjusts twice as much as bit 0).
Increasing the binary value increases the period, and decreasing the value decreases the period.
An additional fine trim bit is available in C4 register as the SCFTRIM bit. Upon reset this value is loaded
with a factory trim value.
If an SCTRIM value stored in nonvolatile memory is to be used, it is your responsibility to copy that value
from the nonvolatile memory location to this register.
x*
7
FLL (or PLL) is not disabled in bypass modes.
FLL (or PLL) is disabled in bypass modes (lower power)
Slow internal reference clock selected.
Fast internal reference clock selected.
1
controls the slow internal reference clock frequency by controlling the slow internal reference
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
x*
6
MCG_C2 field descriptions (continued)
MCG_C3 field descriptions
x*
5
x*
4
SCTRIM
Description
Description
x*
3
x*
2
Freescale Semiconductor, Inc.
x*
1
x*
0