MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 466

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Initialization/application information
21.5.2 Programming errors
The eDMA performs various tests on the transfer control descriptor to verify consistency
in the descriptor data. Most programming errors are reported on a per channel basis with
the exception of channel priority error (ES[CPE]).
For all error types other than channel priority error, the channel number causing the error
is recorded in the ES register. If the error source is not removed before the next activation
of the problem channel, the error is detected and recorded again.
If priority levels are not unique, when any channel requests service, a channel priority
error is reported. The highest channel priority with an active request is selected, but the
lowest numbered channel with that priority is selected by arbitration and executed by the
eDMA engine. The hardware service request handshake signals, error interrupts, and
error reporting is associated with the selected channel.
21.5.3 Arbitration mode considerations
21.5.3.1 Fixed channel arbitration
In this mode, the channel service request from the highest priority channel is selected to
execute.
466
xLAST: Number of bytes added to
current address after major loop
(typically used to loop back)
xADDR: (Starting address)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Figure 21-293. Memory array terms
xSIZE: (size of one
data transfer)
value as xSIZE)
Last minor loop
often the same
(NBYTES in
minor loop,
Minor loop
Minor loop
Offset (xOFF): number of bytes added to
current address after each transfer
Last Address Adjustment (xLAST)
(often the same value as xSIZE)
destination (D) has its own:
Peripheral queues typically
Each DMA source (S) and
have size and offset equal
Address (xADDR)
where x = S or D
Modulo (xMOD)
Offset (xOFF)
Size (xSIZE)
to NBYTES.
Freescale Semiconductor, Inc.

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