MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 708

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Application information
SC = Number of ADCK cycles used during sample window
CADIN = Internal ADC input capacitance
NUMTAU = -ln(LSBERR / 2
LSBERR = value of acceptable sampling error in LSBs
N = 8 in 8-bit mode, 10 in 10-bit mode, 12 in 12-bit mode or 16 in 16-bit mode
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP
and changing the ADLSTS bits (to increase the sample window) or decreasing ADCK
frequency to increase sample time.
31.6.2.2 Pin leakage error
Leakage on the I/O pins can cause conversion error if the external analog source
resistance (R
lower than V
mode, 10 in 10-bit mode, 12 in 12-bit mode, or 16 in 16-bit mode).
31.6.2.3 Noise-induced errors
System noise that occurs during the sample or conversion process can affect the accuracy
of the conversion. The ADC accuracy numbers are guaranteed as specified only if the
following conditions are met:
708
• There is a 0.1 μF low-ESR capacitor from V
• There is a 0.1 μF low-ESR capacitor from V
• If inductive isolation is used from the primary supply, an additional 1 μF capacitor is
• V
• Operate the MCU in Wait or Normal Stop mode before initiating (hardware triggered
placed from V
plane.
conversions) or immediately after initiating (hardware or software triggered
conversions) the ADC conversion.
SSA
(and V
AS
REFH
) is high. If this error cannot be tolerated by the application, keep R
REFL
/ (4 × I
DDA
, if connected) is connected to V
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
to V
LEAK
SSA
N
× 2
)
.
N
) for less than 1/4 LSB leakage error (N = 8 in 8-bit
REFH
DDA
to V
SS
to V
at a quiet point in the ground
SSA
REFL
.
.
Freescale Semiconductor, Inc.
AS