MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 293

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

13.2.2 System Reset Status Register Low (MC_SRSL)
The SRSH:SRSL registers includes read-only status flags to indicate the source of the
most recent reset. The reset state of these bits depends on what caused the MCU to reset.
Throughout this document, SRS refers to SRSH:SRSL.
Address: MC_SRSL is 4007_E000h base + 1h offset = 4007_E001h
Freescale Semiconductor, Inc.
JTAG
POR
Field
Reset
Field
Read
Write
0
7
Bit
The reset value of this register depends on the reset type:
POR
Indicates reset was caused by the ARM core indication of a LOCKUP event.
0
1
JTAG generated reset
Indicates reset was caused by JTAG selection of certain IR codes (EZPORT, EXTEST, HIGHZ, and
CLAMP).
0
1
Power-on reset
Indicates a reset was caused by the power-on detection logic. Because the internal supply voltage was
ramping up at the time, the low-voltage reset (LVD) status bit is also set to indicate that the reset occurred
while the internal supply was below the LVD threshold.
7
1
• POR — 0x82
• LVD — 0x02
• Low-leakage wake-up due to RESET pin assertion — 0x41
• Low-leakage wake-up due to other wake-up sources —
• Other reset — bits 6-5 and 2 are set if their corresponding
Reset not caused by core LOCKUP event
Reset caused by core LOCKUP event
Reset not caused by JTAG
Reset caused by JTAG
0x01
reset source caused the reset
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
PIN
MC_SRSH field descriptions (continued)
0
6
MC_SRSL field descriptions
Table continues on the next page...
COP
0
5
NOTE
0
4
Description
Description
0
0
3
LOC
0
2
Chapter 13 Mode Controller
LVD
1
1
WAKEUP
0
0
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