MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 172

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Manufacturer
Quantity
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Part Number:
MK30DN512ZVLK10
Manufacturer:
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Quantity:
10 000
Reset
6.2.1 Power-on reset (POR)
When power is initially applied to the MCU or when the supply voltage drops below the
power-on reset re-arm voltage level (V
condition.
As the supply voltage rises, the LVD circuit holds the MCU in reset until the supply has
risen above the LVD low threshold (V
are set following a POR.
6.2.2 System resets
Resetting the MCU provides a way to start processing from a known set of initial
conditions. System reset begins with the on-chip regulator in full regulation and system
clocking generation from an internal reference. When the processor exits reset, it
performs the following:
The on-chip peripheral modules are disabled and the non-analog I/O pins are initially
configured as disabled. The pins with analog functions assigned to them default to their
analog function after reset.
During and following a reset, the JTAG pins have their associated input pins configured
as:
and associated output pin configured as:
Note that the nTRST signal is initially configured as disabled, however once configured
to its JTAG functionality its associated input pin is configured as:
172
• Reads the start SP (SP_main) from vector-table offset 0
• Reads the start PC from vector-table offset 4
• LR is set to 0xFFFF_FFFF
• TDI in pull-up (PU)
• TCK in pull-down (PD)
• TMS in PU
• TDO with no pull-down or pull-up
• nTRST in PU
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
LVDL
POR
), the POR circuit causes a POR reset
). The POR and LVD bits in SRSL register
Freescale Semiconductor, Inc.

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