MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 333

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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Chapter 17
Crossbar Switch (AXBS)
17.1 Introduction
This chapter provides information on the layout, configuration, and programming of the
crossbar switch. The crossbar switch connects bus masters and bus slaves using a
crossbar switch structure. This structure allows all bus masters to access different bus
slaves simultaneously, while providing arbitration among the bus masters when they
access the same slave. A variety of bus arbitration methods and attributes may be
programmed on a slave by slave basis.
17.1.1 Features
The crossbar switch includes these distinctive features:
Freescale Semiconductor, Inc.
• Symmetric crossbar bus switch implementation
• 32-bit width and support for byte, 2-byte, 4-byte, and 16-byte burst transfers
• Operation at a 1-to-1 clock frequency with the bus masters
• Low-Power Park mode support
• Allows concurrent accesses from different masters to different slaves
• Slave arbitration attributes configured on a slave by slave basis
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
NOTE
333

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