MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 429

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

21.3.8 Set Enable Request Register (DMA_SERQ)
The SERQ provides a simple memory-mapped mechanism to set a given bit in the ERQ
to enable the DMA request for a given channel. The data value on a register write causes
the corresponding bit in the ERQ to be set. Setting the SAER bit provides a global set
function, forcing the entire contents of ERQ to be set. If the NOP bit is set, the command
is ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address: DMA_SERQ is 4000_8000h base + 1Bh offset = 4000_801Bh
Freescale Semiconductor, Inc.
Reserved
SERQ
SAER
NOP
Reset
Field
Read
5–4
3–0
Write
7
6
Bit
NOP
0
1
Set All Enable Requests
0
1
This field is reserved.
Set enable request
Sets the corresponding bit in ERQ
7
0
0
Normal operation
No operation, ignore the other bits in this register
Set only the ERQ bit specified in the SERQ field
Set all bits in ERQ
SAER
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
0
6
DMA_SERQ field descriptions
0
5
0
0
4
Description
Chapter 21 Direct Memory Access Controller (eDMA)
0
3
0
2
SERQ
0
0
1
0
0
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