MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 43

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Section Number
45.5
Freescale Semiconductor, Inc.
45.4.3
45.4.4
45.4.5
45.4.6
45.4.7
45.4.8
45.4.9
45.4.10
45.4.11
45.4.12
45.4.13
45.4.14
45.4.15
45.4.16
45.4.17
45.4.18
45.4.19
45.4.20
45.4.21
45.4.22
45.4.23
45.4.24
Functional description...................................................................................................................................................1294
45.5.1
45.5.2
45.5.3
45.5.4
45.5.5
Command Argument Register (SDHC_CMDARG)....................................................................................1249
Transfer Type Register (SDHC_XFERTYP)..............................................................................................1250
Command Response 0 (SDHC_CMDRSP0)...............................................................................................1254
Command Response 1 (SDHC_CMDRSP1)...............................................................................................1255
Command Response 2 (SDHC_CMDRSP2)...............................................................................................1255
Command Response 3 (SDHC_CMDRSP3)...............................................................................................1255
Buffer Data Port Register (SDHC_DATPORT)..........................................................................................1257
Present State Register (SDHC_PRSSTAT).................................................................................................1257
Protocol Control Register (SDHC_PROCTL).............................................................................................1262
System Control Register (SDHC_SYSCTL)...............................................................................................1266
Interrupt Status Register (SDHC_IRQSTAT).............................................................................................1269
Interrupt Status Enable Register (SDHC_IRQSTATEN)............................................................................1275
Interrupt Signal Enable Register (SDHC_IRQSIGEN)...............................................................................1278
Auto CMD12 Error Status Register (SDHC_AC12ERR)...........................................................................1280
Host Controller Capabilities (SDHC_HTCAPBLT)....................................................................................1283
Watermark Level Register (SDHC_WML).................................................................................................1285
Force Event Register (SDHC_FEVT)..........................................................................................................1285
ADMA Error Status Register (SDHC_ADMAES)......................................................................................1288
ADMA System Address Register (SDHC_ADSADDR).............................................................................1290
Vendor Specific Register (SDHC_VENDOR)............................................................................................1290
MMC Boot Register (SDHC_MMCBOOT)................................................................................................1292
Host Controller Version (SDHC_HOSTVER)............................................................................................1293
Data buffer...................................................................................................................................................1294
DMA crossbar switch interface....................................................................................................................1300
SD protocol unit...........................................................................................................................................1306
Clock & reset manager.................................................................................................................................1308
Clock generator............................................................................................................................................1309
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Title
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