MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 338

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory Map / Register Definition
17.2.2 Control Register (AXBS_CRSn)
These registers control several features of each slave port and must be accessed using 32-
bit accesses. After CRSn[RO] is set, the CRSn can only be read; attempts to write to it
have no effect and result in an error response.
Addresses: AXBS_CRS0 is 4000_4000h base + 10h offset = 4000_4010h
338
Bit
W
R
Reserved
Reserved
31
0
Field
6–4
2–0
M1
M0
30
7
3
0
AXBS_CRS1 is 4000_4000h base + 110h offset = 4000_4110h
AXBS_CRS2 is 4000_4000h base + 210h offset = 4000_4210h
AXBS_CRS3 is 4000_4000h base + 310h offset = 4000_4310h
AXBS_CRS4 is 4000_4000h base + 410h offset = 4000_4410h
AXBS_CRS5 is 4000_4000h base + 510h offset = 4000_4510h
AXBS_CRS6 is 4000_4000h base + 610h offset = 4000_4610h
AXBS_CRS7 is 4000_4000h base + 710h offset = 4000_4710h
29
0
28
0
This read-only field is reserved and always has the value zero.
Master 1 priority. Sets the arbitration priority for this port on the associated slave port.
000
001
010
011
100
101
110
111
This read-only field is reserved and always has the value zero.
Master 0 priority. Sets the arbitration priority for this port on the associated slave port.
000
001
010
011
100
101
110
111
27
0
26
0
This master has level 1, or highest, priority when accessing the slave port.
This master has level 2 priority when accessing the slave port.
This master has level 3 priority when accessing the slave port.
This master has level 4 priority when accessing the slave port.
This master has level 5 priority when accessing the slave port.
This master has level 6 priority when accessing the slave port.
This master has level 7 priority when accessing the slave port.
This master has level 8, or lowest, priority when accessing the slave port.
This master has level 1, or highest, priority when accessing the slave port.
This master has level 2 priority when accessing the slave port.
This master has level 3 priority when accessing the slave port.
This master has level 4 priority when accessing the slave port.
This master has level 5 priority when accessing the slave port.
This master has level 6 priority when accessing the slave port.
This master has level 7 priority when accessing the slave port.
This master has level 8, or lowest, priority when accessing the slave port.
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
AXBS_PRSn field descriptions (continued)
23
0
22
0
21
0
20
0
0
19
0
18
0
17
0
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
ARB
0
8
Freescale Semiconductor, Inc.
0
7
0
0
6
0
5
4
0
0
0
3
0
2
PARK
0
1
0
0