MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 986

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Introduction
41.1.1 Overview
The CAN protocol was primarily, but not only, designed to be used as a vehicle serial
data bus, meeting the specific requirements of this field: real-time processing, reliable
operation in the EMI environment of a vehicle, cost-effectiveness and required
bandwidth. The FlexCAN module is a full implementation of the CAN protocol
specification, Version 2.0 B, which supports both standard and extended message frames.
The Message Buffers are stored in an embedded RAM dedicated to the FlexCAN
module. See the Chip Configuration details for the actual number of Message Buffers
configured in the MCU.
The CAN Protocol Engine (PE) sub-module manages the serial communication on the
CAN bus, requesting RAM access for receiving and transmitting message frames,
validating received messages and performing error handling. The Controller Host
Interface (CHI) sub-module handles Message Buffer selection for reception and
transmission, taking care of arbitration and ID matching algorithms. The Bus Interface
Unit (BIU) sub-module controls the access to and from the internal interface bus, in order
to establish connection to the CPU and to other blocks. Clocks, address and data buses,
interrupt outputs and test signals are accessed through the Bus Interface Unit.
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Peripheral Bus Interface
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Figure 41-1. FlexCAN Block Diagram
Arbitration
CAN Protocol Engine
Tx
CAN Control
Host Interface
CAN Tx
CAN Bus
Registers
Address, Data, Clocks, Interrupts
Matching
Rx
CAN Rx
Message
Buffers
(MBs)
RAM
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Chip